The present invention relates to a semiconductor device and is favorably applicable to a semiconductor device obtained, for example, by sealing three semiconductor chips each including a power transistor for high-side switch, three semiconductor chips each including a power transistor for low-side switch, and a semiconductor chip controlling these chips.
An inverter circuit in wide use as an example of a power supply circuit has a configuration in which a power MOSFET for high-side switch and a power MOSFET for low-side switch are coupled in series between a terminal supplied with a supply voltage and a terminal supplied with a ground voltage. A supply voltage can be converted with the inverter circuit by controlling a gate voltage of the power MOSFET for high-side switch and a gate voltage of the power MOSFET for low-side switch with a control circuit.
Japanese Unexamined Patent Application Publication No. 2007-012857 (Patent Document 1) describes a technology related to a HSOP 46 for driving a three-phase motor obtained by sealing three first semiconductor chips 30 including a pMISFET and three second semiconductor chips 31 including an nMISFET with a sealing portion 44.
Japanese Unexamined Patent Application Publication No. 2013-149730 (Patent Document 2) describes a power semiconductor module 100B including six semiconductor chips 120c to 120h as IGBT chips and six semiconductor chips 140c to 140h as diode chips as shown in FIG. 9 to FIG. 12.